2018-05-07
A Front-End ASIC With High-Voltage Transmit Switching and Receive Digitization for 3-D Forward-Looking Intravascular Ultrasound Imaging
Publication
Publication
IEEE Journal of Solid-State Circuits
This paper presents an area- and power-efficient application-specified integrated circuit (ASIC) for 3-D forward-looking intravascular ultrasound imaging. The ASIC is intended to be mounted at the tip of a catheter, and has a circular active area with a diameter of 1.5 mm on the top of which a 2-D array of piezoelectric transducer elements is integrated. It requires only four micro-coaxial cables to interface 64 receive (RX) elements and 16 transmit (TX) elements with an imaging system. To do so, it routes high-voltage (HV) pulses generated by the system to selected TX elements using compact HV switch circuits, digitizes the resulting echo signal received by a selected RX element locally, and employs an energy-efficient load-modulation datalink to return the digitized echo signal to the system in a robust manner. A multi-functional command line provides the required sampling clock, configuration data, and supply voltage for the HV switches. The ASIC has been realized in a 0.18-μm HV CMOS technology and consumes only 9.1 mW. Electrical measurements show 28-V HV switching and RX digitization with a 16-MHz bandwidth and 53-dB dynamic range. Acoustical measurements demonstrate successful pulse transmission and reception. Finally, a 3-D ultrasound image of a three-needle phantom is generated to demonstrate the imaging capability.
| Additional Metadata | |
|---|---|
| , , , , , , , , , , , | |
| doi.org/10.1109/JSSC.2018.2828826, hdl.handle.net/1765/106369 | |
| IEEE Journal of Solid-State Circuits | |
| Organisation | Department of Biomedical Engineering |
|
Tan, M. (Mingliang), Chen, C., Chen, Z., Janjic, J., Daeichin, V., Chang, Z. Y., … Pertijs, M. (2018). A Front-End ASIC With High-Voltage Transmit Switching and Receive Digitization for 3-D Forward-Looking Intravascular Ultrasound Imaging. IEEE Journal of Solid-State Circuits. doi:10.1109/JSSC.2018.2828826 |
|