Dependable multicore architectures at nanoscale: The view from Europe
IEEE Design and Test , Volume 32 - Issue 2 p. 17- 28
The introduction of multicore chips allowed the constant increase in delivered performance otherwise impossible to achieve. Multiple microprocessor cores from different instruction set architectures stay at the epicenter of such chips and are surrounded by memory cores of different technologies, sizes and functionalities, as well as by peripheral controllers, special function cores, analog and mixed-signal cores, reconfigurable cores, etc. The functionality as well as the complexity of multicore chips is unprecedented.
|IEEE Design and Test|
|Organisation||Erasmus MC: University Medical Center Rotterdam|
Ottavi, M, Pontarelli, S, Gizopoulos, D, Paschalis, A, Bolchini, C, Michael, M.K, … Hamdioui, S. (2015). Dependable multicore architectures at nanoscale: The view from Europe. IEEE Design and Test, 32(2), 17–28. doi:10.1109/MDAT.2014.2359572